CyberLab: All About Microcontroller

8085, 8086 Micro processor

1. What is microprocessor?
It is a program controlled semi conductor device (IC), which fetches, decodes and execute instructions.

2. What are the basic units of microprocessor?

The basic units or blocks of microprocessor are ALU, an array of registers and control unit.

3. What is a bus?

Bus is a group of conducting lines that carries data, address and control signals.

4. Why data bus is bi-directional?

The microprocessor is to fetch (read) the data from memory or input device for processing and after processing it has to store (write) the data to memory or output devices. Hence the data bus is bi-directional.

5. Why data bus is bi-directional?

The address is an identification number used by the microprocessor to identify or access a memory location or input/output device. It is an output signal from the processor. Hence the address bus is unidirectional.

6. Define machine cycle?

Machine cycle is defined as the time required to complete one operation of accessing memory input/output, or acknowledging an external request. This cycle may consists of three to six T-states.

Micro Processor & Micro Controllers.

7. Define T-state?

T-state is defined as one subdivision of operation performed in one clock period. These subdivisions are internal states synchronized with the system clock, and each T-state is precisely equal to one clock period.

8. What is an instruction cycle?

The sequence of operations that a processor has to carry out while executing the instruction is called instruction cycle. Each instruction cycle of processor contains a number of machine cycles.

9. What is fetch and execute cycle?

The instruction cycle is divided in to fetch and execute cycles. The fetch cycle is executed to fetch the opcode from memory. The execute cycle is executed to decode the instruction and to perform the work instructed by the instruction.

10. List the flags of 8085?

There are five flags in 8085.They are sign flag, zero flag, auxiliary carry flag, parity flag and carry flag.

11. What does memory-mapping mean?
The memory mapping is the process of interfacing memories to microprocessor and allocating addresses to each memory locations.

12. What is opcode fetch cycle?

The opcode fetch cycle is a machine cycle executed to fetch the opcode of an instruction stored in memory. Each instruction starts with opcode fetch machine cycle.

13. What are the instructions used to control the interrupts?

· EI

· DI

· RIM
· SIM

14. What is polling?

In polling, the microprocessor’s software simply checks each of the I/O devices every so often. During this check, the microprocessor tests to see if any device needs servicing.

15. What are the different types of interrupts?

· Hardware

· Software

Hardware interrupts- The interrupts where the CPU pins are used to receive interrupt requests , are called hardware interrupts.

Software interrupts – This interrupt is caused by the execution of the instruction. These are special instructions supported by the microprocessor.

16. What are the types of hardware interrupts?

TRAP

RST 7.5

RST 6.5

RST 5.5

INTR

17. Difference between memory mapped i/o and i/o mapped io?

In memory mapped i/o, device address is 16 bits. Thus A0 to A15 lines are used to generate the device address.

In i/o mapped i/o, device address is 8 bit. Thus A0 to A7 or A8 to A15 lines are used to generatye device address.

18. Describe the function of the following pins in 8085?
a) READY b) ALE c) IO/M d) HOLD e)SID and SOD
READY – It is used by the microprocessor to sense whether a peripheral is ready or not for data transfer. If not, the rocessor waits. It is thus used to synchronize slower peripherals to the microprocessor.

ALE – In 8085 , ADo to AD7 lines are multiplexed and lower half of address (Ao to A7) is available only during T1 of the machine cycle.

The latching of lower half address from the multiplexed address lines by using ALE signal.

IO/M – indicates whether I/O operation or memory operation is being carried out.

HOLD – This signal indicates that another master is requesting for the use of address bus, data bus and control bus.

SID(Serial Input Data) – This input signal is used to accept serial data bit by bit from the external device.

SOD(Serial Output Data) – This is an output signal which enables the transmission of serial data bit by bit to the external device.

20. What is ALE?
The ALE (Address latch enable) is a signal used to demultiplex the address and data lines using an external latch. It is used to enable the external latch.

21. Where is the READY signal used?

READY is an input signal to the processor, used by the memory or input/output devices to get extra time for data transfer or to introduce wait states in the bus cycles.

22. Give some examples of port devices used in 8085 microprocessor based system?

The various port devices used in 8085 are 8212,8155,8156,8255,8355,8755.

23. What is the need for timing diagram?

The timing diagram provides information regarding the status of various signals, when a machine cycle is executed. The knowledge of timing diagram is essential for system designer to select matched peripheral devices like memories, latches, ports etc from a microprocessor system.

24. What operation is performed during first T-state of every machine cycle in 8085?
In 8085, during the first T-state of every machine cycle the low byte address is latched into an external latch using ALE signal.

25. What is interrupt acknowledge cycle?

The interrupt acknowledge cycle is a machine cycle executed by 8085 processor to get the address of the interrupt service routine in order to service the interrupt device.

26. What is vectored and non-vectored interrupt?

When an interrupt is accepted, if the processor control branches to a specific address defined by the manufacturer then the interrupt is called vectored interrupt. In Non-vectored interrupt there is no specific address for storing the interrupt service routine. Hence the interrupted device should give the address of the interrupt service routine.

27. List the software and hardware interrupts of 8085?

Software interrupts : RST 0,RST 1,RST 2,RST 3,RST 4,RST 5,RST 6,RST 7

Hardware interrupts : TRAP,RST 7.5,RST 6.5,RST 5.5, INTR.

28. What is TRAP?

The TRAP is a non-maskable interrupt of 8085. It is not disabled by processor reset or after recognition of interrupt.

29. How clock signals are generated in 8085 and what is the frequency of the internal clock?

The 8085 has the clock generation circuit on the chip but an external quartz crystal or LC circuit or RC circuit should be connected at the pins X1 andX2. The maximum internal clock frequency of 8085 is 3.03MHz.

30. Define stack?

Stack is a sequence of RAM memory locations defined by the programmer.

31. What is program counter? How it is useful in program execution?

The program counter keeps track of program execution. To execute a program the starting address of the program is loaded in program counter. The PC sends out an address to fetch a byte of instruction from memory and increments its content automatically.

32. Define opcode and operand?

Opcode(operation code) is the part of an instruction that identifies a specific operation. Operand is a part of instruction that represents a value on which the instruction acts.

33. How the 8085 processor differentiates a memory access and I/O access?

The memory access and I/O access is differentiated using IO/M signal. The 8085 processor asserts IO/M low for memory operation and high for I/O operations.

34. When the 8085 processor checks for an interrupt?

In the second T-state of the last machine cycle of every instruction, the 8085 processor checks whether an interrupt request is made or not.

35. Why interfacing is needed for I/O devices?

Generally I/O devices are slow devices. Therefore the speed of I/O devices does not match with the speed of microprocessor. And so an interface is provided between system bus and I/O devices.

36. What is interrupt I/O?

If the I/O device initiate the data transfer through interrupt then the I/O is called interrupt driven I/O.

37. What is a port?

The port is a buffered I/O, which is used to hold the data transmitted from the microprocessor to I/O devices and vice versa.

38. What is the need for interrupt controller?

The interrupt controller is employed to expand the interrupt inputs. It can handle the interrupt request from various devices and allow one by one to the processor.

39. What is synchronous data transfer scheme?

For synchronous data transfer scheme, the processor does not check the readiness of the device after a command have been issued for read/write operation. For this scheme the processor will request the device to get ready and then read/write to the device immediately after the request.

40. What is asynchronous data transfer scheme?

In asynchronous data transfer scheme, first the processor sends a request to the device for read/write operation. Then the processor keeps on polling the status of the device. Once the device is ready, the processor executes a data transfer instruction to complete the process.

41. What are the internal devices of 8255?

The internal devices of 8255 are port-A, port-B, port-C. The ports can be programmed for either input or output function in different operating modes.

42. What is USART?

The device which can be programmed to perform Synchronous or Asynchronous serial communication is called USART (Universal Synchronous Asynchronous Receiver Transmitter). Eg: INTEL 8251

43. What is scanning in keyboard and what is scan time?

The process of sending a zero to each row of a keyboard matrix and reading the columns for key actuation is called scanning. The scan time is the time taken by the processor to scan all the rows one by one starting from first row and coming back to the first row again.

44. What is programmable peripheral device?

If the function performed by the peripheral device can be altered or changed by a program instruction then the peripheral device is called programmable device. It have control register. The device can be programmed by sending control word in the prescribed format to the control register.

45. What is baud rate?

The baud rate is the rate at which the serial data are transmitted. Baud rate is defined as (The time for a bit cell). In some systems one bit cell has one data bit, then the baud rate and bits/sec are same.

46. What are the tasks involved in keyboard interface?

The tasks involved in keyboard interfacing are sensing a key actuation, Debouncing the key and generating key codes( Decoding the key). These tasks are performed software if the keyboard is interfaced through ports and they are performed by hardware if the keyboard is interfaces through 8279.

47. How a keyboard matrix is formed in keyboard interface using 8279?

The return lines, RL0 toRL7 of 8279 are used to form the columns of keyboard matrix. In decoded scan lines SL0 t0SL3 of 8279 are used to form the rows of keyboard matrix. In encoded scan mode, the output lines of external decoder are used as rows of keyboard matrix.

48. What is GPIB?

GPIB is the General Purpose interface Bus. It is used to interface the test instruments to the system controller.

49. Advantages of differential data transfer?

1. Communication at high data rate in real world environment.

2. Differential data transmission offers superior performance.

3. Differential signals can help induced noise signals.

50. Features of INTEL 8259?

1. It manage 8 interrupt request.

2. The interrupt vector addresses are programmable.

3. The priorities of interrupts are programmable.

4. The interrupt can be masked or unmasked individually.

51. What are the various registers in 8085?

Accumulator register, Temporary register, Instruction register, Stack Pointer, Program Counter are the various registers in 8085.

52. In 8085 name the 16 bit registers?

Stack pointer and Program counter all have 16 bits.

53. What are the various flags used in 8085?

Sign flag, Zero flag, Auxillary flag, Parity flag, Carry flag.

54. What is Stack Pointer?

Stack pointer is a special purpose 16-bit register in the Microprocessor, which holds the address of the top of the stack.

55. What is Program counter?

Program counter holds the address of either the first byte of the next instruction to be fetched for execution or the address of the next byte of a multi byte instruction, which has not been completely fetched. In both the cases it gets incremented automatically one by one as the instruction bytes get fetched. Also Program register keeps the address of the next instruction.

56. Which Stack is used in 8085?

LIFO (Last In First Out) stack is used in 8085.In this type of Stack the last stored information can be retrieved first.

57. What happens when HLT instruction is executed in processor?

The Micro Processor enters into Halt-State and the buses are tri-stated.

58. What is meant by a bus?

A bus is a group of conducting lines that carriers data, address, & control signals.

59. What is Tri-state logic?

Three Logic Levels are used and they are High, Low, High impedance state. The high and low are normal logic levels & high impedance state is electrical open circuit conditions. Tri-state logic has a third line called enable line.

60. Give an example of one address microprocessor?

8085 is a one address microprocessor.

61. In what way interrupts are classified in 8085?

In 8085 the interrupts are classified as Hardware and Software interrupts.

62. What are Hardware interrupts?

TRAP, RST7.5, RST6.5, RST5.5, INTR.

63. What are Software interrupts?

RST0, RST1, RST2, RST3, RST4, RST5, RST6, RST7.

64. Which interrupt has the highest priority?

TRAP has the highest priority.

65. Name 5 different addressing modes?

Immediate, Direct, Register, Register indirect, Implied addressing modes.

66. How many interrupts are there in 8085?

There are 12 interrupts in 8085.

67. What is clock frequency for 8085?

3 MHz is the maximum clock frequency for 8085.

68. What is the RST for the TRAP?

RST 4.5 is called as TRAP.

69. In 8085 which is called as High order / Low order Register?

Flag is called as Low order register & Accumulator is called as High order Register.

70. What are input & output devices?

Keyboards, Floppy disk are the examples of input devices. Printer, LED / LCD display, CRT Monitor are the examples of output devices.

71. Can an RC circuit be used as clock source for 8085?

Yes, it can be used, if an accurate clock frequency is not required. Also, the component cost is low compared to LC or Crystal.

72. Why crystal is a preferred clock source?

Because of high stability, large Q (Quality Factor) & the frequency that doesn’t drift with aging. Crystal is used as a clock source most of the times.

73. Which interrupt is not level-sensitive in 8085?

RST 7.5 is a raising edge-triggering interrupt.

74. What does Quality factor mean?

The Quality factor is also defined, as Q. So it is a number, which reflects the lossness of a circuit. Higher the Q, the lower are the losses.

75. What are level-triggering interrupt?

RST 6.5 & RST 5.5 are level-triggering interrupts.

76. Give an example haw to write code memory using MOVC instruction.?

MOVC instruction can only ne used to READ code memoy. It cannot be used to write (use an dedicated programmer to write in code memory)

78. What is a Microprocessor?

Microprocessor is a program-controlled device, which fetches the instructions from memory, decodes and executes the instructions. Most Micro Processor are single- chip devices.

79. Give examples for 8 / 16 / 32 bit Microprocessor?

8-bit Processor - 8085 / Z80 / 6800;

16-bit Processor - 8086 / 68000 / Z8000;

32-bit Processor - 80386 / 80486.

80. Why 8085 processor is called an 8 bit processor?

Because 8085 processor has 8 bit ALU (Arithmetic Logic Review). Similarly 8086 processor has 16 bit ALU.

81. What is 1st / 2nd / 3rd / 4th generation processor?

The processor made of PMOS / NMOS / HMOS / HCMOS technology is called 1st / 2nd / 3rd / 4th generation processor, and it is made up of 4 / 8 / 16 / 32 bits.

82. Define HCMOS?

High-density n- type Complimentary Metal Oxide Silicon field effect transistor.

83. What does microprocessor speed depend on?

The processing speed depends on DATA BUS WIDTH.

84. Is the address bus unidirectional?

The address bus is unidirectional because the address information is always given by the Micro Processor to address a memory location of an input / output devices.

85. Is the data bus is Bi-directional?

The data bus is Bi-directional because the same bus is used for transfer of data between Micro Processor and memory or input / output devices in both the direction.

86. What is the disadvantage of microprocessor?

It has limitations on the size of data. Most Microprocessor does not support floating-point operations.

87. What is the difference between microprocessor and microcontroller?

In Microprocessor more op-codes, few bit handling instructions. But in Microcontroller: fewer op-codes, more bit handling Instructions, and also it is defined as a device that includes micro processor, memory, & input / output signal lines on a single chip.

88. What is meant by LATCH?

Latch is a D- type flip-flop used as a temporary storage device controlled by a timing signal, which can store 0 or 1. The primary function of a Latch is data storage. It is used in output devices such as LED, to hold the data for display.

89. Why does microprocessor contain ROM chips?

Microprocessor contain ROM chip because it contain instructions to execute data.

90. What is the difference between primary & secondary storage device?

In primary storage device the storage capacity is limited. It has a volatile memory. In secondary storage device the storage capacity is larger. It is a nonvolatile memory. Primary devices are: RAM / ROM. Secondary devices are: Floppy disc / Hard disk.

91. Difference between static and dynamic RAM?

Static RAM: No refreshing, 6 to 8 MOS transistors are required to form one memory cell, Information stored as voltage level in a flip flop. Dynamic RAM: Refreshed periodically, 3 to 4 transistors are required to form one memory cell, Information is stored as a charge in the gate to substrate capacitance.

92. What is interrupt?

Interrupt is a signal send by external device to the processor so as to request the processor to perform a particular work.

93. What is cache memory?

Cache memory is a small high-speed memory. It is used for temporary storage of data & information between the main memory and the CPU (center processing unit). The cache memory is only in RAM.

94. What is called “Scratch pad of computer”?

Cache Memory is scratch pad of computer.

95. Which transistor is used in each cell of EPROM?

Floating –gate Avalanche Injection MOS (FAMOS) transistor is used in each cell of EPROM.

96. Differentiate between RAM and ROM?

RAM: Read / Write memory, High Speed, Volatile Memory. ROM: Read only memory, Low Speed, Non Voliate Memory.

97. What is a compiler?

Compiler is used to translate the high-level language program into machine code at a time. It doesn’t require special instruction to store in a memory, it stores automatically. The Execution time is less compared to Interpreter.

98. Which processor structure is pipelined?

All x86 processors have pipelined structure.

99. What is flag?

Flag is a flip-flop used to store the information about the status of a processor and the status of the instruction executed most recently

100. What is stack?

Stack is a portion of RAM used for saving the content of Program Counter and general purpose registers.

101. Can ROM be used as stack?

ROM cannot be used as stack because it is not possible to write to ROM.

102. What is NV-RAM?

Nonvolatile Read Write Memory, also called Flash memory. It is also know as shadow RAM.

103. Why crystal is a preferred clock source?

Because of high stability, large Q (Quality Factor) & the frequency that doesn?t drift with aging. Crystal is used as a clock source most of the times.

104. In 8085 which is called as High order / Low order Register?
Flag is called as Low order register & Accumulator is called as High order Register.

105. What is Tri-state logic?
Three Logic Levels are used and they are High, Low, High impedance state. The high and low are normal logic levels & high impedance state is electrical open circuit conditions. Tri-state logic has a third line called enable line.

106. What happens when HLT instruction is executed in processor?
The Micro Processor enters into Halt-State and the buses are tri-stated.

107. Which Stack is used in 8085?
LIFO (Last In First Out) stack is used in 8085.In this type of Stack the last stored information can be retrieved first

108. What is Program counter?
Program counter holds the address of either the first byte of the next instruction to be fetched for execution or the address of the next byte of a multi byte instruction, which has not been completely fetched. In both the cases it gets incremented automatically one by one as the instruction bytes get fetched. Also Program register keeps the address of the next instruction.

109. What?s the speed and device maximum specs for Firewire?
IEEE 1394 (Firewire) supports the maximum of 63 connected devices with speeds up to 400 Mbps. Where?s MBR located on the disk? Main Boot Record is located in sector 0, track 0, head 0, cylinder 0 of the primary active partition.

110. Where does CPU Enhanced mode originate from?
Intel?s 80386 was the first 32-bit processor, and since the company had to backward-support the 8086. All the modern Intel-based processors run in the Enhanced mode, capable of switching between Real mode (just like the real 8086) and Protected mode, which is the current mode of operation.

111. How many bit combinations are there in a byte?
Byte contains 8 combinations of bits.

112. Have you studied buses? What types?
There are three types of buses.
Address bus: This is used to carry the Address to the memory to fetch either Instruction or Data.
Data bus : This is used to carry the Data from the memory.
Control bus : This is used to carry the Control signals like RD/WR, Select etc.

113. What is the Maximum clock frequency in 8086?
5 Mhz is the Maximum clock frequency in 8086.

114. What is meant by Maskable interrupts?
An interrupt that can be turned off by the programmer is known as Maskable interrupt.

115. What is Non-Maskable interrupts?
An interrupt which can be never be turned off (ie. disabled) is known as Non-Maskable interrupt

116. What are the different functional units in 8086?
Bus Interface Unit and Execution unit, are the two different functional units in 8086.

117. What are the various segment registers in 8086?
Code, Data, Stack, Extra Segment registers in 8086.

118. What does EU do?
Execution Unit receives program instruction codes and data from BIU, executes these instructions and store the result in general registers.

119. Which Stack is used in 8086? k is used in 8086?
FIFO (First In First Out) stack is used in 8086.In this type of Stack the first stored information is retrieved first.

120. What are the flags in 8086?
In 8086 Carry flag, Parity flag, Auxiliary carry flag, Zero flag, Overflow flag, Trace flag, Interrupt flag, Direction flag, and Sign flag.

121. What is SIM and RIM instructions?
SIM is Set Interrupt Mask. Used to mask the hardware interrupts.
RIM is Read Interrupt Mask. Used to check whether the interrupt is Masked or not.

123. What is the difference between 8086 and 8088?
The BIU in 8088 is 8-bit data bus & 16- bit in 8086.Instruction queue is 4 byte long in 8088and 6 byte in 8086.

124. Give example for Non-Maskable interrupts?
Trap is known as Non-Maskable interrupts, which is used in emergency condition.

125. Give examples for Micro controller?
Z80, Intel MSC51 &96, Motorola are the best examples of Microcontroller.

126. What are the various segment registers in 8086?

Code, Data, Stack, Extra Segment registers in 8086.

127. Give examples for Maskable interrupts?

RST 7.5, RST6.5, RST5.5 are Maskable interrupts

128. What are the flags in 8086?

In 8086 Carry flag, Parity flag, Auxiliary carry flag, Zero flag, Overflow flag, Trace flag, Interrupt flag, Direction flag, and Sign flag.

129 . Which interrupt has the highest priority?

a) INTR b) TRAP c) RST6.5

130. In 8085 name the 16 bit registers?

a) Stack pointer b) Program counter c) a & b

131. Which of the following is hardware interrupts?

a) RST5.5, RST6.5, RST7.5 b) INTR, TRAP c) a & b

132. What is the RST for the TRAP?

a) RST5.5 b) RST4.5 c) RST4

133. What are level Triggering interrupts?

a) INTR&TRAP b)RST6.5&RST5.5 c)RST7.5&RST6.5

134. Which interrupt is not level sensitive in 8085?

a) RST6.5 is a raising edge-trigging interrupt.

b) RST7.5 is a raising edge-trigging interrupt.

c) a & b.

135. What are software interrupts?

a) RST 0 – 7 b) RST 5.5 – 7.5 c) INTR, TRAP

136. Which stack is used in 8085?

a) FIFO b) LIFO c) FILO

137. Why 8085 processor is called an 8 bit processor?

a) Because 8085 processor has 8 bit ALU.

b) Because 8085 processor has 8 bit data bus.

c) a & b.

138. What is SIM?

a) Select Interrupt Mask b) Sorting Interrupt Mask c) Set Interrupt Mask.

139. RIM is used to check whether, ______

a) The write operation is done or not

b) The interrupt is Masked or not

c) a & b

140. What is meant by Maskable interrupts?

a) An interrupt which can never be turned off.

b) An interrupt that can be turned off by the programmer.

c) none

141. In 8086, Example for Non maskable interrupts are

a) Trap b) RST6.5 c) INTR

142. What does microprocessor speed depends on?

a) Clock b) Data bus width c) Address bus width

143. Can ROM be used as stack?

a) Yes b) No c) sometimes yes, sometimes no

144. Which processor structure is pipelined?

a) all x80 processors b) all x85 processors c) all x86 processors

145. Address line for RST3 is?

a) 0020H b) 0028H c) 0018H

146. In 8086 the overflow flag is set when

a) The sum is more than 16 bits

b) Signed numbers go out of their range after an arithmetic operation

c) Carry and sign flags are set

d) During subtraction

147. The advantage of memory mapped I/O over I/O mapped I/O is,

a) Faster

b) Many instructions supporting memory mapped I/O

c) Require a bigger address decoder

d) All the above

148. BHE of 8086 microprocessor signal is used to interface the

a) Even bank memory

b) Odd bank memory

c) I/O

d) DMA

149. In 8086 microprocessor the following has the highest priority among all type

interrupts.

a) NMI

b) DIV 0

c) TYPE 255

d) OVER FLOW

150. In 8086 microprocessor one of the following statements is not true.

a) Coprocessor is interfaced in MAX mode

b) Coprocessor is interfaced in MIN mode

c) I/O can be interfaced in MAX / MIN mode

d) Supports pipelining

151. 8088 microprocessor differs with 8086 microprocessor in

a) Data width on the output

b) Address capability

c) Support of coprocessor

d) Support of MAX / MIN mode

152. Address line for TRAP is?

a) 0023H b) 0024H c) 0033H

Micro controller questions

1. What is meant by micro controller?

A device which contains the microprocessor with integrated peripherals like memory, serial ports, parallel ports, timer/counter, interrupt controller, data acquisition interfaces like ADC, DAC is called micro controller.

2. List the features of 8051 micro controllers?

· Single supply +5v operation using HMOS technology.

· 4096 bytes program memory on-chip.

· 128 data memory on chip.

· 4 register banks

· 2 multiple modes, 16 bit timer/counter

· Extensive Boolean processing capabilities.

· 64KB external RAM size.

· 32 bi-directional I/O lines.

3. Explain the operating mode 0 of 8051 serial port?

In this mode serial data enters and exists through RXD, TXD outputs the shift clock. 8-bits are transmitted or received:8-data bits(LSB first). The baud rate is fixed at 1/12 the oscillator frequency.

4. Explain the operating mode 2 of 8051 serial port?

In this mode 11 bits are transmitted (through TXD) or received (through (RXD): a start bit(0), 8 data bits( LSB first), a programmable 9th data bit and a stop bit(1). On transmit, the 9th data bit can be assigned the value 0 or 1. On receive, the 9th data bit go into the RB8 in special function register SCON, while the stop bit is ignored.

The baud rate is programmable to either 1/32 or 1/64 the oscillator frequency.

5. Explain the mode 3 of 8051 serial port?

In this mode, 11 bits are transmitted (through TXD) or (received (through RXD): a start bit(0), 8 data bits(LSB first), a programmable 9th data bit and a stop

bit(1).It is same as mode 2 except the baud rate. The baud rate in mode 3 is variable.

6. Explain the interrupts of 8051 micro controller?

· External interrupt 0 (IE0) – Highest priority

· Timer interrupt 0 (TF0)

· External interrupt 1 (IE1)

· Timer interrupt 1 (TF1)

· Serial port Interrupt

Receive interrupt (RI) – lowest priority

Transmit interrupt (TI)

7. How many bytes of internal RAM and ROM supported by 8051 micro controller?

128 bytes of internal RAM and 4 bytes of ROM.

8. Define machine cycle of 8051?

8051 machine cycle consists of 6 states, S1 through S7. One state is made up of 2 clock pulses. Thus 12 clock period constitute one machine cycle. Two clock periods in a state is termed as phase 1 and phase 2.

9. What are the special function of port 0 of 8051?

Port 0 is used as a multiplexed low order address/data bus during the external memory access. When ALE is enabled, the address on port 0 pins are latched and bus is ready to act as a data bus when ALE is low.

10. What are the alternative function of port 3 of 8051?

Serial data input (P3.0), serial data output (P3.1), external interrupt 0 (P3.2), external interrupt 1 (P3.3), external input for timer 0(P3.4), external input for timer 1 (P3.5), external memory write pulse (P3.6), external memory read (P3.7) are the alternative functions of port 3.

11. What are the use of scratch pad area of internal RAM of 8051?

In internal RAM 80 bytes constitutes the scratch pad area. The scratch pad bytes can be programmed as a general purpose registers.

12. What are the flags supported by 8051 controller?

· Carry flag

· Auxiliary carry flag

· Over flow flag

· General purpose user flag

· Register bank select bit one

· Register bank select bit zero

· Parity flag

13. What is meant by Power-on- Reset in 8051 controller?

When RESET pin is activated, the 8051 jumps to address location 0000H. This is called as Power-on-Reset. Reset pin is considered as a sixth interrupt source of 8051.

14. What are the significance of SFRs?

SFRs denotes Special function Registers of 8051 controller. All the controller registers such as port latches, timer register, peripheral control register, accumulator, PC and DPTR all are available in SFR region.

15. What are the different group of instructions supported by 8051?

· Data Transfer Group

· Arithmetic Group

· Logical Group

· Branching Group

· Bit manipulation Group

16. Write a program to mask the 0th and 7th bit using 8051?

MOV A,#data

ANL A,#81

MOV DPTR,#4500

MOVX @DPTR,A

LOOP: SJMP LOOP

17. List the addressing modes of 8051?

· Direct addressing

· Register addressing

· Register indirect addressing

· Implicit addressing

· Immediate addressing

· Index addressing

· Bit addressing

18. Write about CALL statement in 8051?

There are two CALL instructions. They are

· LCALL(Long call)

· ACALL(Absolute call)

19. Write about the jump statement?

There are three forms of jump. They are

LJMP (Long jump) – 16 bit address

AJMP(Absolute jump) – 11 bit address

SJMP (Short jump) – relative address

20. Write a program to find the 2’s complement using 8051?

MOV A, R0

CPL A

INC A

21. Write a program to swap two numbers using 8051?

MOV A,# data

SWAP A

22. Write a program to subtract two numbers & exchange the digits using 8051?

MOV A,#9F

MOV R0,#40

SUBB A,R0

SWAP A

23. What are the different types of Address decoding Techniques?

Absolute decoding/Full decoding

Linear decoding/Partial decoding

25. What is the significance of wait state generator?

This is used to transfer data between slower I/O device and the microprocessor. In some applns, the speed of I/O systems is not compatible with the microprocessor’s timings. So the microprocessor has to confirm whether the peripheral is ready or not. If READY pin is high, the peripheral is ready otherwise 8085 enters in to wait state.

26. What is a Non-maskable interrupt?

It is unaffected by any mask or interrupt enable. Eg: TRAP

27. What is a Data pointer register?

The data pointer register (DPTR) consists of a high byte(DPH) and a low byte (DPL) functions to hold 16 bit address. It may be manipulated as a 16-bit data register or as independent 8-bit registers. It serves as a base register in indirect jumps, look up table instructions and external data transfer.

28. What are the operating modes of 8279?

1. Input modes

· Scanned keyboard

· Scanned sensor matrix

· Strobed input

2. Display modes

· Left entry (Type writer mode)

· Right entry (Calculator mode)

29. What are the different functional units in 8279?

CPU interface section

Keyboard section

Display section

Scan section

30. What are the priority modes in 8259?

a. Fully nested mode

b. Special fully nested mode

c. Rotating Priority mode

d. Special Masked mode

e. Polled mode

31. What is IMR(Interrupt mask register)?

IMR stores the masking bits of the interrupt lines to be masked. This register can be programmed by an operation command word (OCW).

32. What is priority resolver?

It determines the priorities of the bits set in the Interrupt request register (IRR).The bit corresponding to the highest priority interrupt input is set in the ISR during INTA input.

33. What is the use of IRR?

The interrupt request register is used to store all the interrupt levels which are requesting the service. The eight interrupt inputs sets corresponding bits of the Interrupt Request Register upon the service request.

34. What is Interrupt service register(ISR)?

The interrupt service register stores all the levels that are currently being

serviced.

35. What is the difference between SHLD and LHLD?

SHLD- Store HL register pair in memory.

This instruction is used to store the contents of H and L register directly in to memory.

LHLD- Load HL register pair from memory.

This instruction copies the contents of memory location given with in the instruction in to the L register and the contents of next memory location in to the H register.

36. What is the difference between STAX and LDAX?

STAX rp – Store the contents of Accumulator register (A) in memory location whose address is specified by BC or DE register pair.

LDAX rp – Load Accumulator register (A) with the contents of memory location whose address is specified by BC or DE register pair.

37. Write an assembly language program to transfer data from memory block B1 to

memory block B2?

MVI C,0AH; Initialize counter

LXI H, 2200H; Initialize source memory pointer

LXI D, 2300H; Initialize destination memory pointer

Loop: MOV A,M; Get byte from source memory block

STAX D; Store byte in the destination memory block

INX H; Increment source memory pointer

INX D; Increment destination memory pointer

DCR C; Decrement counter

JNZ Loop ; If counter ¹ 0 repeat

HLT

38. What are the types of branching instructions?

1. Jump instructions

2. Call and Return instructions

3. Restart instructions

39. Write an assembly language program to add 2 BCD numbers?

LXI H,2200H; Initialize pointer

MOV A,M ; Get the first number

INX H; Increment the pointer

ADD M ; Add two numbers

DAA ; Convert HEX to valid BCD

STA 2300; store the result

HLT

40. Explain the instruction LXI rp,data (16)?

LXI rp, data(16) – Load 16 –bit immediate data to specified register pair or stack pointer. The rp is 16 – bit register pairs such as BC, DE, HL or stack pointer.

41. Write the difference between LDA and STA instruction?

LDA – Load data in to Accumulator register(A) directly from the address specified with in the instruction.

STA – Store the contents of Accumulator register(A) to the address specified with in the instruction.

42. What are the types of rotate instructions?

RLC – Rotate Accumulator Left

RRC- Rotate Accumulator Right

RAL – Rotate Accumulator Left through Carry

RAR – Rotate Accumulator Right through Carry

43. What are the operating modes of 8255?

1. Bit set/Reset mode

2. I/O modes

a)mode 0 : Simple input/output

b)mode 1 : Input/output with handshake

c)mode 2 : Bi-directional I/O data transfer

44. What are the priority modes in 8259?

1. Fully nested mode

2. Special fully nested mode

3. Rotating priority mode

4. Special mask mode

5. Poll mode

45. What is the use of SWAP function in 8051?

SWAP A : Swap nibbles with in the Accumulator bytes.

It interchanges the low and high order nibbles of the Accumulator (bits 0-3 and bits 4-7)

46. What is SCON?

SCON is the serial port control register , which contains not only the mode selection bits (SM0 – SM2 ,REN), but also the 9th data bit for transmit and receive (TB8 and RB8) and the serial port interrupt bits (TI and RI).

SM0 – Serial port mode control bit 0

SM1 – Serial port mode control bit 1

SM2 – Serial port mode control bit 2

REN – Receiver enable control bit

TB8 – Transmit bit 8

RB8 – Receive bit 8

TI – Transmit Interrupt flag

RI – Receive interrupt flag

47. How we calculate the Baud rate for serial port in mode 0?

Baud Rate = Oscillator frequency/12

48. What is the significance of TXD and RXD pins in 8051?

TXD – Transmit data pin for serial port in UART mode. Clock output in shift register

mode.

RXD – Receive data pin for serial port in UART mode. Data I/O pin in shift register

mode.

49. Write two examples of Register indirect Addressing modes in 8051?

MOV A,@R0 ; Load the contents pointed by R0 in A.

ADD A,@R1 ; Add the contents of A and the contents pointed by R1.

50. What is Accumulator Register?

It is an 8 – bit register. It holds a source operand and receives the result of the arithmetic instructions (Addition, Subtraction, Multiplication and Division)

51. Explain haw Timer2 works in a STANDARD 8051 device?

TIMER2 is NOT implemented in standard 8051 device. It is implemented only in 8052 devices.

Digital system designs questions

1. The fundamental conceptual unit in a computer is:
a. CPU
b. Hard Drive
c. Operating System
d. (Transistor)

2. In a 8086/8088 Microprocessor, the unit responsible for getting the instructions from memory and loading in the Queue is.
a. Execution Unit
b. Registers
c. Stack
d. (Bus Interface Unit)

3. When you transfer the record from a Big Endian system to a Little Endian system
over the network in order to get the original value, you must:
a. reverse the byte within a word
b. reverse the bytes in an integer
c. reverse the characters in a word
d. (there is no simple solution)

4. To transmit data bits 1011, the correct even parity seven bit Hamming Code is
a. 0101101
b. (1010101)
c. 1100111
d. 0110111

5. The cause of propagation delay is the time it takes a pulse to get through a logic device
a. (True)
b. False

6. If CS= 24F6 and IP =634A, the physical address is
a. 24F6: 634A
b. 34F5F
c. (2B2AA)
d. 24F60

8. The instruction MOV CL, [BX][DI]+8 represents the following addressing mode
a.based relative
b.(based indexed)
c.indexed relative
d.register indirect

9. The amount of time required to read a block of data from a disk into memory is composed of seek time, rotational latency, and transfer time. Rotational latency refers to
a. the time it takes for the platter to make a full rotation
b. the time it takes for the read-write head to move into position over the appropriate track
c. (the time it takes for the platter to rotate the correct sector under the head)
d. none of the above

10. If a magnetic disc has 100 cylinders, each containing 10 tracks of 10 sectors, and each sector can contain 128 bytes, what is the maximum capacity of the disk in bytes?
a. 128,000
b. 12,800,000
c. 12,800
d. (1,280,000)

11. According to the specifications of a particular hard disk a seek takes 3 msecs (thousandths of a second) between adjacent tracks. If the disk has 100 cylinders how long will it take for the head to move from the innermost cylinder to the outermost cylinder.
a. 30 microseconds
b. (300 msecs)
c. 3000 msecs
d. 3 microseconds

12. What characteristic of RAM memory makes it not suitable for permanent storage?
a. too slow
b. unreliable
c. (it is volatile)
d. too bulky

13. Part of the operating system is usually stored in ROM so that it can be used to boot up the computer. ROM is used rather than RAM because
a. ROM chips are faster than RAM
b. (ROM chips are not volatile)
c. ROM chips are cheaper than RAM chips
d. none of the above

14. A given memory chip has 12 address pins and 4 data pins. It has the following number of locations.
a. 2^4
b. (2^12)
c. 2^48
d. 2^16

15. RAM is called DRAM(Dynamic RAM) when
a. it is always moving around data
b. (it requires periodic refreshing)
c. it can do several things simultaneously
d. none of the above

16. Which of the following is Non-Volatile memory?
a. (EEPROM)
b. SRAM
c. DRAM
d. None of the above

17. Two’s complement notation is frequently used for internal representation of
a. fractions
b. (integers)
c. True and False values
d. floating point numbers

18. If the ASCII code for A is 1000001, B is 1000010, and C is 1000011 then the string 100001110000011000010 represents:
a. (CAB)
b. BAC
c. CCB
d. ABC

19. The two’s complement representation of –10 is:
a. (11110110)
b. 11011001
c. 00001010
d. 11111100

20. The binary representation of 15 is:
a. 01010
b. (011110
c. 10011
d. 00101

21. Floating point representation is used to store
a. Boolean values
b. whole numbers
c. (real numbers)
d. integers

22. Binary numbers can be used to represent
a.Integers only
b.Fractions only
c.Both fractions and integers
d. (both fractions and integers.)

23. In order to execute a program instructions must be transferred from memory along a bus to the CPU. If the bus has 8 data lines, at most one 8 bit byte can be transferred at a time. How many memory access would be needed in this case to transfer a 32 bit instruction from memory to the CPU.
a. 1
b. 2
c. 3
d. (4)

24. Suppose that a bus has 16 data lines and requires 4 cycles of 250 nsecs each to transfer data. The bandwidth of this bus would be 2 Megabytes/sec. If the cycle time of the bus was reduced to 125 nsecs and the number of cycles required for transfer stayed the same what would the bandwidth of the bus?
a. 1 Megabyte/sec
b. (4 Megabytes/sec)
c. 8 Megabytes/sec
d. 2 Megabytes/sec

26. A computer’s memory is composed of 8K words of 32 bits each. How many bits are required for memory address if the smallest addressable memory unit is a word?
a. (13)
b. 8
c. 10
d. 6

27. A computer’s memory is composed of 4K words of 32 bits each. How many total bits in memory?
a. 12800
b. 1280000
c. 1310720
d. (131072)

28. A computer’s memory is composed of 8K words of 32 bits each, and a byte is 8 bits. How many bytes does this memory contain?
a. 8K
b. (32K)
c. 16K
d. 4K

29. A computer’s memory is composed of 8K words of 32 bits each, and the smallest addressable memory unit is an 8 bit byte. How many bits will be required for the memory address?
a. 12
b. (15)
c. 13
d. 10

30. A “word” is the natural unit of organization of memory. Different computer types may have different word lengths (in bits) .
a. (True)
b. False

31. Cache memory refers to
a. cheap memory that can be plugged into the mother board to expand main memory
b. (fast memory present on the processor chip that is used to store recently accessed data)
c. a reserved portion of main memory used to save important data
d. a special area of memory on the chip that is used to save frequently used constants

32. Registers contain data and instructions needed by the CPU.
a. (True)
b. False

33. A computer that is advertised as having a 96K byte DRAM memory and a 2.1 Gigabyte hard drive has
a. (96 K bytes of primary memory and 2.1 Gigabytes of secondary memory)
b. 2.1 Gigabytes of primary memory and 96K bytes of secondary memory
c. 96 bytes of cache, 2.1 gigabytes of primary memory
d. 96K bytes of cache, 96 K bytes of primary memory , and 2.1 Gigabytes of secondary memory

34. A memory management technique used to improve computer performance is
a. selecting memory chips based on their cost
b. storing as much data as possible on disk
c. (using the cache to store data that will most likely be needed soon)
d. preventing data from being moved from the cache to primary memory

35. The fetch-decode-execute cycle refers to the process by which data is read from the hard drive and stored in memory.
a. True
b. (False)

36. Interrupts can be generated in response to
a. detected program errors such as arithmetic overflow or division by zero
b. detected hardware faults
c. Input/Output activities
d. Internal timers
e. b, c, and d
f. (a, b, c, and d)

37. Virtually all computer designs are based on the von Neumann architecture. A high level view of this architecture has the following three components:
a. Buses, memory, input/output controllers
b. Hard disks, floppy disks, and the CPU
c. memory, the CPU, and printers
d. (memory, input/output modules, and the CPU)

38. Which of the following programming languages has an instruction set closest to the machine language of a computer?
a. BASIC
b. Fortran
c. (Assembly Language)
d. C++

39. The first person who published paper on using computers to perform tasks other than computations is
a. Charles Babbage
b. Lady Lovelace
c. (Alan Turing)
d. Konrad Zuse

40. What was the name of the government funded computer used during World War II to compute firing tables?
a. VAX computer
b. IBM computer
c. Colossus computer
d. (ENIAC computer)

41. Which of the following started out as separate program from operating systems but usually is included as part of the OS later on?
a. (Text Editor)
b. Command processor
c. Resource allocator
d. Dispatcher

42. An operating system that allows several processors to perform computation as the same time is call
a. Single program
b. Multitasking
c. (Multiprocessing)
d. Real time processing

43. The kind of interface with icons and menu bars for user to point at with mouse instead of entering commands for operating system to perform certain tasks is called
a. (GUI)
b. Command line interface
c. User friendly programming
d. None of the above

44. he prime targets of software pirates are
a. programs written for mainframes
b. (games and application programs for microcomputers)
c. programs in the public domain
d. none of the above

45. Considering the impacts computer technology has on modern society, which of the following is negative?
a. People can communicate with each other without geographical limitations
b. Stock brokers do not need to be in a central place for trading
c. (More people totally rely on computers when doing their works)
d. Information can reach different area and people at light speed

46. A student retrieve a copy of a program assignment from the recycle bin in the computer lab and use the code to complete his own program assignment. His action is considered
a. (legal but unethical)
b. illegal and unethical
c. legal and ethical
d. illegal but ethical

Note: The answers are given in brakets

Questions about microprocessors

1.   Difference between Microprocessor & Microcontroller?

2.   What is an addressing mode?

3.   How the Microprocessors can be categorized?

4.   What is stack and Subroutine?

5.   Mention the features of 8086?

6.   Define Opcode and Operand

7.   Explain how physical address is formed in 8086.

8.   Calculate the physical address for the given data. DS=1000h,BP=1234h

9.   What is the purpose of HLT instruction?

10.   What happens if the result is greater than 16bit?

11.   Give the steps to calculate physical address?

12.   If carry is set to 1 before subtraction what is the instruction to be used?

13.   What is the difference between MOV AX, [1100] and MOV [1200],AX?

14.   A single instruction may use more than one addressing modes or some instructions may not require any addressing modes. Why?

15.   How is the addressing mode of an instruction communicated to the CPU?

16.   How does the CPU identify between 8-bit and 16-bit operation?

17.   What do you mean by pipelined architecture?

18.   What is a Flag register?

19.   What is a machine cycle?

20.   What is a status signal?

21.   What is minimum mode operation of 8086?

22.   What is the maximum memory addressing and I/O addressing capabilities of 8086?

23.   List out the type of addressing modes used in your program.

24.   If result exceeds 32 bit where is it stored?

25.   What is the name given to the register combination DX:AX?

26.   What is the instruction used for signed division?

27.   In the above program instead of DIV BX, is it possible to use DIV num2?

28.   Where is the remainder in 16 bit division?

29.   From which address the 8086 starts execution after reset?

30.   Draw the flowchart to find the largest and smallest number of an array?

31.   What is the similarity and difference between Subtract and Compare Instruction?

32.   What are the addressing modes are used in your program?

33.   Initialize register CX to value FFFF and register AX to value 0000, write a program to        exchange the contents of both these register?

34.   Illustrate the use of LEA, LDS, and LES instruction and to initialize registers using these instructions?

35.   Logic calculations are done in which type of registers?

36.   In the 8086 microprocessor program, data and stack memory occupies uniform memory space. State true or false?

37.   Explain cross-compiler, linker, editor?

38.   What is the purpose of MOV DS, AX?

39.   What will be the status of flags after executing the program?

40.   What are the addressing modes are used in our program?

41.   What is the difference between JUMP and LOOP instructions?

42.   What instructions are needed to add AL, 3L and DL together, and place the result in CL? Do not destroy BL or DL.

43.   show the instruction needed to count the number of 1’s found in AL. For example if AL contains 10110001, the number of 1’s is 4.

44.   What is purpose served by CX register?

45.   What is the purpose of XCHG instruction?

46.   What is the use of PUSH and POP instruction?

47.   Write an assembly language program in 8086 to sort the given array of 16- bit numbers in descending order.

48.   What do square brackets means when they appear in an operand?

49.   What is the difference between MOV AX, 0 and SUB AX, AX? There may be more than one difference to comment on.

50.   Write a routine to swap nibbles in AL. For example if AL contains 3E, then it will contain E3 after execution.

51.   What is operating frequency of 8086 & 8085?

52.   Explain basic difference between 8086 & 8088.

53.   What do you mean by assembler?

54.   What do you mean by linker?

55.   What do you mean by loader?

56.   What do you mean by compiler?

57.   What do you mean by machine cycle?

58.   How does 8086 differentiated between an opcode and instruction data?

59.   What is use of timing and control unit?

60.   What is maximum memory addressing and I/O addressing capability of 8086?

61.   From which address 8086-start execution after reset.

62.   What is use of maximum mode in 8086?

63.   What is use of 8284 IC?

64.   What is LOCK prefix? What is its use?

65.   What is REP prefix? What is its use?

66.   Explain the bi-functionality of AX register.

67.   Explain the bi-functionality of BX register.

68.   Explain the bi-functionality of CX register.

69.   Explain the bi-functionality of DX register.

70.   How does CPU identify between 8-bit and 16-bit operations?

71.   What is the difference between the jump and loop instructions.

72.   Which instruction of 8086 can be used for look up table manipulations?

73.   What is difference between the respective shifts and rotate instructions?

74.   How will you enter the single step mode of 8086?

75.   What determines whether the microprocessor is an 8-bit, 16-bit or 32-bit microprocessor?

76.   What is the size of 8086-address bus?

77.   What do you mean by pipelining?

78.   Why instruction queue of 8086 of 6-byte long?

79.   What are the uses of flags?

80.   Calculate the physical addresses represented by

      a.   1234H: 0002H
      b.   2670H: 2222H
      c.   F2F2H: 1234H

81.   What are the main differences between the general-purpose registers, index and pointer registers?

82.   What addressing mode is used the following instruction

        MOV AX, BX              MOV AX, [DI]                 MOV [SI + BP]                 MOV CX, 2342H

83.   What is wrong with a MOV [BX], [DI] instruction?

84.   What is wrong with a MOV AX, DL instruction?

85.   What do you understand by machine language?

86.   Differentiate between direct and displacement addressing modes?

87.   Calculate the memory address the following instructions will access. Also

88.   Explain the addressing modes that are used by each instruction.

            MOV CX, [1234H],         MOV AX, [2222H],          MOV DX, [BP],          MOV DX, [BP+DI]

            MOV DX, [BP + SI + 200H],        MOV DX, [BP + DI + 01H],        MOV AX, 1234H

89.   What is the difference between assembly and high-level languages?

90.   What is the function of AD15 – AD0? ?

91.   What is the function of RESET pin?

92.   What is the function of MN/MX pin?

93.   What is the function of NMI pin?

94.   What is the function of READY pin?

95.   What is the function of TEST pin?

96.   What is the function of BHE/S7 pin?

97.   What is the function of RD pin?

98.   What is the use of PUSH and POP instructions?

99.   What is the function of IN and OUT instructions?

100.   What is the difference between LAHF and SAHF?

101.   What is the operation of the LEA instruction?

102.   Explain the direction flag and its use in string data transfer instruction

103.   What are the differences between LODSB, LODSW, STOSB, and STOSW?

104.   What are the differences between LAHF instruction and POP flag reg. Instruction?

105.   What is Assembly language?

106.   What is the function of DT/R?

107.   How is the 8086 data address bus demultiplexed?

108.   What is a bus cycle?

109.   What is the function of DEN?

110.   What is the function of S2, S1, and S0?

111.   What is the function of AND, OR, XOR instructions?

112.   What is the function of NOT and NEG instructions?

113.   What is the function of TEST instruction? On which register it is effective?

114.   What is the function of MUL & IMUL?

115.   What is the function of DIV & IDIV?

116.   How many ports are present in PIO 8255?

117.   How port C works in PPI 8255?

118.   How many modes are present in PPI 8255?

119.   What is the function of BSR mode in PPI 8255?

120.   In which application, BSR mode can be used?

121.   Give the Control Word Format of 8255 in I/O and BSR mode.

122.   What is the role of stack in calling a subroutine and returning from the routine?

123.   What is the difference between a NEAR and a FAR procedure?

124.   How do you set or clear the interrupt flag IF?

125.   What are the interrupt vector addresses of the following interrupts in the 8086 IVT?

                      a. INTO            b. NMI             c. INT 20H            d. INT 55H

126. What is the difference between hardware and software interrupt?

127.    What is the difference between LDS and LES

Questions from microcontrollers

1. The instructions like MUL AB and DIV AB instruction uses the registers

        a. A    b. B         c. C d. D

2. ________ is often used to store 2-byte values which have nothing to do with memory locations.

     a. stack pointe       b. data pointer       c. program counter    d. timer

3. RD and WR as needed during ________ memory accesses.

    a. internal         b. external data    c. input data          d. internal program

4. INC DPTR instruction takes ________ microseconds to get executed.

    a. 1 b. 2        c.4        d. 8

5. The DIV AB instruction divides the Accumulator by the data in the B register and leaves the 8-bit quotient in the Accumulator, and the 8-bit remainder in the ___________

   a. A register      b .bank 0    c. Bank 1         d. B register

6. ADD and ADDC instructions should always be followed by________ a operation, to ensure that the result is also in BCD

   a. JC b. JNC c. DAD       d.DAA

7. POP direct instruction affects ________ flag.

   a. zero    b. No flag     c. carry    d. None of the above

8. 8051AH follows _______ circuit type.

   a. CMOS      b .HMOS    c. SMOS d. CHMOS

9. Driving the ALE and PSEN pins to Owhile reset is active could cause the deviceto go into an __________ state.

a. active      b. Inactive c. Determined d. Indeterminate

10. In accessing the stack we use______________ addressing mode.

a. direct      b. Indirect    c. Register       d. Register indirect

11. PUSH A is ________ operation.

a. valid    b. invalid          c. no       d. all the above

12. MOV A,#85h;
      CPL A;
      ADD A,#1; the output is

   a.7Bh    b. 7Ah       c.85h        d.01h

13.29h in BCD when converted to ASCII is ______h and _____h

   a.02 and 09 b.0010 1001    c. 32 and 39 d.39 and 32

14.The RAM location in the 8051 from 30h to 7Fh is allocated to ____

   a.bit addressable RAM    b.scratch pad       c.bank 3 d. Bank 2

15. MOV R1,R2; is _________instruction

   a.invalid    b.1 byte c.2 byte d. valid

16.in _______ the microcontroller continuously monitors the status of a given device,when the status is met it performs the operation.

   a. interrupt    b.ISR     c. Polling      d. Subroutine

17.The speed of the semiconductor memory is in the range of ____ seconds.

   a.micro      b. Milli      c. Nano      d.pico

18.CLR A instruction affects ______ flag.

   a.zero        b. Carry     c. None of these       d. all the flag

19.________ is referred as ROM-less 8051.

   a.8052       b. 8751    c.8031        d.8951

20.popular 8051 chips have on-chip ROM in the form of _______.

   a.RAM        b.SRAM      c. DRAM          d. flash memory

questions from a Intel interview

Have you studied buses? What types?
Have you studied pipe lining? List the 5 stages of a 5 stage pipeline. Assuming 1 clock per stage, what is the latency of an instruction in a 5 stage machine? What is the throughput of this machine ?
How many bit combination are there in a byte?
For a single computer processor computer system, what is the purpose of a processor cache and describe its operation?
Explain the operation considering a two processor computer system with a cache for each processor.
What are the main issues associated with multiprocessor caches and how might you solve them?
Explain the difference between write through and write back cache.
Are you familiar with the term MESI?
Are you familiar with the term snooping?
Describe a finite state machine that will detect three consecutive coin tosses (of one coin) that results in heads.
In what cases do you need to double clock a signal before presenting it to a synchronous state machine?
You have a driver that drives a long signal & connects to an input device. At the input device there is either overshoot, undershoot or signal threshold violations, what can be done to correct this problem?
What are the total number of lines written by you in C/C++? What is the most complicated/valuable program written in C/C++?
What compiler was used?
What is the difference between = and == in C?
Are you familiar with VHDL and/or Verilog?
What types of CMOS memories have you designed? What were their size? Speed?
What work have you done on full chip Clock and Power distribution? What process technology and budgets were used?
What types of I/O have you designed? What were their size? Speed? Configuration? Voltage requirements?
Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
What types of high speed CMOS circuits have you designed?
What transistor level design tools are you proficient with? What types of designs were they used on?
What products have you designed which have entered high volume production?
What was your role in the silicon evaluation/product ramp? What tools did you use?
If not into production, how far did you follow the design and why did not you see it into production?

Embedded systems interview questions

Can structures be passed to the functions by value?
Why cannot arrays be passed by values to functions?
Advantages and disadvantages of using macro and inline functions?
What happens when recursion functions are declared inline?
Scope of static variables?
Difference between object oriented and object based languages?
Multiple inheritance - objects contain howmany multiply inherited ancestor?
What are the 4 different types of inheritance relationship?
How would you find out the no of instance of a class?
Is java a pure object oriented language? Why?
Order of constructor and destructor call in case of multiple inheritance?
Can u have inline virtual functions in a class?
When you inherit a class using private keyword which members of base class are visible to the derived class?
What is the output of printf("\nab\bcd\ref"); -> ef
#define cat(x,y) x##y concatenates x to y. But cat(cat(1,2),3) does not expand but gives preprocessor warning. Why?
Can you have constant volatile variable? Yes, you can have a volatile pointer?
++*ip increments what? it increments what ip points to
Operations involving unsigned and signed — unsigned will be converted to signed
a+++b -> (a++)+b
malloc(sizeof(0)) will return — valid pointer
main() {fork();fork();fork();printf("hello world"); } — will print 8 times.
Array of points to functions — void (*fptr[10])()
Which way of writing infinite loops is more efficient than others? there are 3ways.
# error — what it does?
Who to know whether system uses big endian or little endian format and how to convert among them?
What is interrupt latency?
What is forward reference w.r.t. pointers in c?
How is generic list manipulation function written which accepts elements of any kind?
What is the difference between hard real-time and soft real-time OS?
What is interrupt latency? How can you reduce it?
What is the difference between embedded systems and the system in which rtos is running?
How can you define a structure with bit field members?
What are the features different in pSOS and vxWorks?
How do you write a function which takes 2 arguments - a byte and a field in the byte and returns the value of the field in that byte?
What are the different storage classes in C?
What are the different qualifiers in C?
What are the different BSD and SVR4 communication mechanisms

Computer architecture and design interview questions

What is pipe lining?
What are the five stages in a DLX pipeline?
For a pipeline with ‘n’ stages, what’s the ideal throughput? What prevents us from achieving this ideal throughput?
What are the different hazards? How do you avoid them?
Instead of just 5-8 pipe stages why not have, say, a pipeline with 50 pipe stages?
What are Branch Prediction and Branch Target Buffers?
How do you handle precise exceptions or interrupts?
What is a cache?
What’s the difference between Write-Through and Write-Back Caches? Explain advantages and disadvantages of each.
Cache Size is 64KB, Block size is 32B and the cache is Two-Way Set Associative. For a 32-bit physical address, give the division between Block Offset, Index and Tag.
What is Virtual Memory?
What is Cache Coherency?
What is MESI?
What is a Snooping cache?
What are the components in a Microprocessor?
What is ACBF(Hex) divided by 16?
Convert 65(Hex) to Binary
Convert a number to its two’s compliment and back
The CPU is busy but you want to stop and do some other task. How do you do it?

Hardware design interview questions

Give two ways of converting a two input NAND gate to an inverter
Given a circuit, draw its exact timing response. (I was given a Pseudo Random Signal Generator; you can expect any sequential ckt)
What are set up time & hold time constraints? What do they signify? Which one is critical for estimating maximum clock frequency of a circuit?
Give a circuit to divide frequency of clock cycle by two
Design a divide-by-3 sequential circuit with 50% duty circle. (Hint: Double the Clock)
Suppose you have a combinational circuit between two registers driven by a clock. What will you do if the delay of the combinational circuit is greater than your clock signal? (You can’t resize the combinational circuit transistors)
The answer to the above question is breaking the combinational circuit and pipelining it. What will be affected if you do this?
What are the different Adder circuits you studied?
Give the truth table for a Half Adder. Give a gate level implementation of the same.
Draw a Transmission Gate-based D-Latch.
Design a Transmission Gate based XOR. Now, how do you convert it to XNOR? (Without inverting the output)
How do you detect if two 8-bit signals are same?
How do you detect a sequence of "1101" arriving serially from a signal line?
Design any FSM in VHDL or Verilog.
Explain RC circuit.s charging and discharging.
Explain the working of a binary counter.
Describe how you would reverse a singly linked list.

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